reverse-skills-max: initial public release (restored, redacted, hardened)
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name: auditing-uefi-firmware-with-chipsec
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description: Use Intel CHIPSEC to assess platform firmware configuration, SPI flash write protection, BIOS lock, SMM/SMRR, and Secure Boot variable state, dump SPI flash, and triage UEFI variables for firmware-level threats.
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domain: cybersecurity
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subdomain: hardware-firmware-security
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tags:
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- hardware-firmware-security
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- uefi
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- chipsec
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- spi-flash
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- bios-write-protection
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- secure-boot
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- firmware-assessment
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- platform-security
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version: '1.0'
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author: mahipal
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license: Apache-2.0
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nist_csf:
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- ID.AM-02
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mitre_attack:
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- T1542.001
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---
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# Auditing UEFI Firmware with CHIPSEC
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> **Authorized Use Only:** CHIPSEC loads a kernel driver and reads/writes low-level hardware registers, SPI flash, and SMM. Run it only on systems you own or are explicitly authorized to assess, ideally on dedicated test hardware. Misuse (especially write/modify modules) can brick a machine. Never run write-capable modules on production systems.
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## Overview
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CHIPSEC is the open-source **Platform Security Assessment Framework** created by Intel's Advanced Threat Research team. It inspects the low-level security configuration of x86 platform firmware and hardware — the layer below the operating system where bootkits and firmware implants live. CHIPSEC loads a signed kernel driver (Linux, Windows, or it can run from the UEFI shell) to read and write hardware registers, Model-Specific Registers (MSRs), PCI config space, SPI flash, and UEFI variables, then runs an automated test suite that checks whether the platform's defensive locks are actually engaged.
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The threat CHIPSEC addresses is MITRE ATT&CK **T1542.001 — Pre-OS Boot: System Firmware**: adversaries who modify system firmware (the BIOS/UEFI image on SPI flash) to gain stealthy, persistent, OS-survivable control. Firmware implants persist across OS reinstall and disk replacement and are invisible to most EDR. CHIPSEC's value is verifying the *prerequisites* that prevent such implants: that the SPI flash BIOS region is write-protected (BIOS_CNTL `BLE`/`SMM_BWP`, SPI Protected Ranges), that the flash descriptor locks region access, that SMRAM/SMRR are configured, and that Secure Boot variables are protected. It also dumps the SPI flash for offline forensic comparison.
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Sources: Intel/CHIPSEC project (https://github.com/chipsec/chipsec), CHIPSEC documentation (https://chipsec.github.io/).
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## When to Use
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- Baseline firmware-security assessment of a new laptop/server platform or fleet image
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- Verifying that BIOS write protection and SPI flash locks are correctly enabled by the OEM
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- Firmware forensics: dumping SPI flash to compare against a known-good image
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- Validating Secure Boot variable protection and S3 boot-script protection
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- Hunting for evidence of a firmware implant or misconfiguration enabling one
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## Prerequisites
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- Physical or admin/root access to the target x86 platform (Intel or AMD)
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- Linux (root) or Windows (Administrator), or a UEFI shell environment
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- Ability to load a kernel driver (Secure Boot may need to allow the CHIPSEC driver, or use `--no_driver` for limited checks)
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- Python 3.8+ and a C compiler/build tools for the kernel module on Linux
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- Dedicated test hardware strongly recommended
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Install CHIPSEC:
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```bash
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# From PyPI
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pip install chipsec
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# Or from source (builds the kernel helper/driver)
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git clone https://github.com/chipsec/chipsec
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cd chipsec
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python setup.py install # builds and installs, including the Linux driver
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# Verify
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sudo chipsec_main --help
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sudo chipsec_util --help
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```
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## Objectives
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- Run the full automated platform-security test suite and interpret PASS/FAIL/WARNING
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- Verify BIOS write protection (BIOS_CNTL) and SPI Protected Ranges
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- Verify the SPI flash descriptor locks region read/write access
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- Verify SMRAM/SMRR and SMI handler protections
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- Verify Secure Boot variable protection and S3 boot-script protection
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- Dump SPI flash and decode it for offline analysis
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- Enumerate UEFI variables and detect anomalous/unexpected entries
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## MITRE ATT&CK Mapping
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| Technique ID | Name | Tactic |
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|--------------|------|--------|
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| T1542.001 | Pre-OS Boot: System Firmware | Persistence / Defense Evasion |
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CHIPSEC defends against T1542.001 by verifying that the controls preventing unauthorized firmware modification are enabled. A FAIL on `common.bios_wp` (BIOS not write-protected) or `chipsec.modules.common.spi_lock` (flash descriptor unlocked) means an attacker with OS privileges could rewrite the SPI flash and implant persistent firmware — exactly the precondition for this technique.
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## Workflow
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### Step 1: Run the full automated test suite
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`chipsec_main` with no module argument runs every applicable security check for the detected platform and prints a summary of PASS/FAIL/WARNING/INFORMATION results.
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```bash
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sudo chipsec_main
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# Save machine-readable output for reporting / diffing
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sudo chipsec_main -j results.json -x results.xml -l chipsec.log
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```
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### Step 2: Run the core firmware-protection modules individually
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The `common` module group contains the OEM-independent security checks. Run the group or specific modules:
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```bash
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# Run the whole common group
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sudo chipsec_main -m common
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# BIOS write protection: checks BIOS_CNTL BLE/SMM_BWP and SPI protected ranges
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sudo chipsec_main -m common.bios_wp
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# SPI flash descriptor lock (FLOCKDN) — are flash region accesses locked?
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sudo chipsec_main -m common.spi_lock
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# SMRR programming — protects SMRAM from cache-based attacks
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sudo chipsec_main -m common.smrr
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# SMM BIOS write protection
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sudo chipsec_main -m common.smm
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# S3 resume boot-script protection (against bootscript table attacks)
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sudo chipsec_main -m common.uefi.s3bootscript
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```
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### Step 3: Verify Secure Boot variable protection
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```bash
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# Checks that Secure Boot UEFI variables are properly protected
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sudo chipsec_main -m common.secureboot.variables
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# To actively test write protection of the variables (test hardware ONLY):
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sudo chipsec_main -m common.secureboot.variables -a modify
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```
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### Step 4: Inspect SPI flash region access permissions
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```bash
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# Report SPI flash regions, descriptor, and access permissions
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sudo chipsec_util spi info
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# Check the SPI access-control module
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sudo chipsec_main -m common.spi_access
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```
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### Step 5: Dump SPI flash for offline forensics
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Dumping the flash lets you decode the firmware volumes and compare against a known-good OEM image.
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```bash
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# Dump the entire SPI flash to a file
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sudo chipsec_util spi dump rom.bin
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# Decode the dumped image: extracts firmware volumes, files, NVRAM variables, etc.
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sudo chipsec_util decode rom.bin
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```
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### Step 6: Enumerate and triage UEFI variables
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```bash
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# List all UEFI variables from the runtime interface
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sudo chipsec_util uefi var-list
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# List variables directly from the SPI image (offline)
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sudo chipsec_util uefi var-find PK
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sudo chipsec_util uefi var-read db <GUID> db.bin
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# Decode the UEFI firmware structure
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sudo chipsec_util uefi decode rom.bin
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```
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### Step 7: Limited assessment without a kernel driver
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Where loading the driver is impossible (locked-down Secure Boot), some checks still run read-only.
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```bash
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sudo chipsec_main -n # --no_driver: skip checks that need the driver
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sudo chipsec_main -p <PLATFORM> # force platform code if auto-detect fails
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```
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### Step 8: Triage results and report
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- **FAIL** on `bios_wp` / `spi_lock` → firmware is rewritable from the OS: high risk for T1542.001.
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- **FAIL** on `secureboot.variables` → Secure Boot policy can be tampered.
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- Compare the `spi dump` against the OEM's known-good image (hash firmware volumes) to detect unauthorized modification.
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- Record platform, BIOS version, and every FAIL/WARNING with the relevant register values for the report.
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## Tools and Resources
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| Tool | Purpose | Source |
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|------|---------|--------|
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| chipsec_main | Automated platform-security test suite | https://github.com/chipsec/chipsec |
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| chipsec_util | Manual hardware/firmware access (spi, uefi, decode) | https://chipsec.github.io/ |
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| UEFITool | GUI/CLI parsing of dumped UEFI images | https://github.com/LongSoft/UEFITool |
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| Binarly fwhunt | Firmware vulnerability/implant hunting rules | https://github.com/binarly-io/fwhunt-scan |
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| NSA UEFI Secure Boot guidance | Hardening reference | https://media.defense.gov/ |
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## Core Module Reference
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| Module | Checks |
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|--------|--------|
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| common.bios_wp | BIOS_CNTL BLE / SMM_BWP and SPI Protected Ranges |
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| common.spi_lock | SPI flash descriptor FLOCKDN |
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| common.spi_access | SPI flash region read/write permissions |
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| common.smrr | System Management Range Registers programming |
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| common.smm | SMM BIOS write protection |
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| common.secureboot.variables | Secure Boot variable protection |
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| common.uefi.s3bootscript | S3 resume boot-script protection |
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## Validation Criteria
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- [ ] CHIPSEC installed and driver loads (or `-n` documented if not)
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- [ ] Full `chipsec_main` suite executed with JSON/XML/log output saved
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- [ ] `common.bios_wp` result interpreted (write protection state)
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- [ ] `common.spi_lock` / `spi_access` result interpreted (descriptor lock)
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- [ ] SMRR/SMM module results recorded
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- [ ] Secure Boot variable protection checked
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- [ ] SPI flash dumped and decoded for offline analysis
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- [ ] UEFI variables enumerated and triaged
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- [ ] All FAIL/WARNING findings documented with platform/BIOS version
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- [ ] Write/modify modules NOT run on production hardware
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